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INTEGRATED CIRCUITS
DATA SHEET
SAA7360 Bitstream conversion ADC for digital audio systems
Product specification Supersedes data of July 1993 File under Integrated Circuits, IC01 1995 Apr 24
Philips Semiconductors
Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
FEATURES * Stereo input * Single-ended input * Uncommitted input buffer for filtering and pre-scaling * Fully differential analog-to-digital converter (ADC) using 3rd order Sigma-Delta modulation * 128 times oversampling * Four stage digital decimation filter * Switchable high-pass filter to remove DC offsets * 16-bit or 18-bit selectable output in a multiple of formats * Sampling rates between 18 and 53 kHz supported * Master or slave operation * Choice of 2 crystal frequencies * Single power supply operation (+5 V). QUICK REFERENCE DATA SYMBOL VDD fxtal THD + N PARAMETER supply voltage crystal frequency total harmonic distortion + noise 256fs 512fs CONDITIONS - - - MIN. 4.5 TYP. 5.0 11.2896 22.5792 -90 GENERAL DESCRIPTION
SAA7360
The SAA7360 is a CMOS ADC using Philips bitstream conversion technique. The device is designed for digital audio playback systems, such as digital amplifiers, CD-recordable and Digital Compact Cassette (DCC). The device is a complementary device to the SAA7350 bitstream conversion digital-to-analog converter (DAC).
MAX. 5.5 - - -85
UNIT V MHz MHz dB
ORDERING INFORMATION TYPE NUMBER SAA7360GP Note 1. When using IR reflow soldering it is recommended that the Drypack instructions in the "Quality Reference Pocketbook" (order number 9398 510 34011) are followed. PACKAGE NAME QFP44(1) DESCRIPTION plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm VERSION SOT205-1
1995 Apr 24
2
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1995 Apr 24
BAOL 31 BAIL 30 SDM V refL VDACN VDACP VDDAT VSSAT V refL V refR 27 29 20 19 35 21 V ref TIMING 1st DECIMATION FILTER STAGE 8f s 2nd DECIMATION FILTER STAGE fs HIGHPASS FILTER OUTPUT INTERFACE 128f s 40 MUX 39 42 41 14 11 12 13 28 I ref 128f s BAIR 26 SDM V refR V SSA VDDA 37 36 25 BAOR 22 BBOR 24 NINR 23 PINR 15 DSEL 17 DIOR 38 2 5 4 44 MUX 10 WSEL TSEL ODF1 ODF2 SWSO SCKO SDO SWSI SCKI BBOL 34 NINL 32 PINL 33 DIOL 18 DCKO 16 XIN 6 XOUT 7 TIMING AND CONTROL XSYS1 8 XSYS2 9 1 FSEL V refL
BLOCK DIAGRAM
Philips Semiconductors
Bitstream conversion ADC for digital audio systems
3
I ref
SAA7360
43 3
CEN RESET TEST2
V refR
HPEN TEST1 VDDD VSSD
MLA714 - 1
Product specification
SAA7360
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
PINNING SYMBOL FSEL PIN 1 DESCRIPTION
SAA7360
Crystal frequency select input. This pin is used to select the master crystal frequency as follows: FSEL = HIGH = 256fs; FSEL = LOW = 512fs; if unconnected the pin will default HIGH. test input 1; this pin should be left open-circuit test input 2; this pin should be left open-circuit supply ground for the digital section supply voltage for the digital section (+5 V) crystal oscillator input crystal oscillator output system clock output output clock at a frequency half the system clock frequency serial interface clock input serial interface clock output serial interface data output serial interface word select input serial interface word select output input for selecting between the internally generated 1-bit code (DSEL = HIGH) or an externally generated 1-bit code (DSEL = LOW); if unconnected this pin defaults HIGH 1-bit code clock output 1-bit code input/output (right channel) 1-bit code input/output (left channel) supply ground for the analog timing section supply voltage for the analog timing section (+5 V) voltage reference generator for the right channel analog section output of right channel buffer operational amplifier `B' positive input to right channel Sigma-Delta modulator negative input to right channel Sigma-Delta modulator output of right channel buffer operational amplifier `A' input of right channel buffer operational amplifier `A' negative voltage reference level input for the DACs current reference output positive voltage reference level input for the DACs input of left channel buffer operational amplifier `A' output of left channel buffer operational amplifier `A' negative input to left channel Sigma-Delta modulator positive input to left channel Sigma-Delta modulator output of left channel buffer operational amplifier `B' voltage reference generator for the left channel analog section supply voltage for the analog section (+5 V) supply ground for the analog section
TEST1 TEST2 VSSD VDDD XIN XOUT XSYS1 XSYS2 SCKI SCKO SDO SWSI SWSO DSEL DCKO DIOR DIOL VSSAT VDDAT VrefR BBOR PINR NINR BAOR BAIR VDACN Iref VDACP BAIL BAOL NINL PINL BBOL VrefL VDDA VSSA
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
SYMBOL HPEN TSEL WSEL ODF2 and ODF1 RESET CEN PIN 38 39 40 DESCRIPTION
SAA7360
high-pass filter enable input (HPEN = HIGH = enabled); if unconnected this pin defaults HIGH input to select master (TSEL = LOW) or slave (TSEL = HIGH) operation of the serial interface; if unconnected this pin defaults HIGH input to indicate 16-bit (WSEL = HIGH) or 18-bit (WSEL = LOW) output data word length of the serial interface; if unconnected this pin defaults HIGH
41 and 42 serial interface format inputs; these 2 pins determine the interface format in which the device will operate (see Chapter "Functional Description"); if unconnected these pins will default HIGH (I2S format) 43 44 Power-On Reset (POR) input (active LOW) to mute the digital output during power on Chip enable input; this pin, when LOW, disables the operation of the device and 3-states the outputs of the serial interface bus. This enables the connection of one of more devices to the output bus; if unconnected this pin defaults HIGH.
40 WSEL
38 HPEN
37 VSSA 36 VDDA
41 ODF2
43
42
39 TSEL
44 CEN
35
FSEL TEST1 TEST2 VSSD VDDD XIN XOUT XSYS1 XSYS2
1 2 3 4 5 6 7 8 9
34
BBOL
ODF1
V refL
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RESET
33 PINL 32 NINL 31 BAOL 30 BAIL 29 V DACP
SAA7360
28
I ref
27 VDACN 26 BAIR 25 BAOR 24 NINR 23 PINR
MLA715 - 2
SCKI 10 SCKO 11
SWSI 13
SWSO 14
DSEL 15
DCKO 16
VSSAT 19
VDDAT 20
V refR 21
SDO 12
DIOR 17
DIOL 18
Fig.2 Pin configuration.
1995 Apr 24
5
BBOR 22
Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
FUNCTIONAL DESCRIPTION General The SAA7360 is a bitstream conversion CMOS ADC for digital audio systems. The device consists of a input buffer which can be configured by the user for pre-scaling and anti-aliasing, a third order Sigma- Delta modulator with a performance of better than 90 dB THD + Noise, and decimation filters with anti-aliasing suppression of >93 dB and in band ripple of less than 0.0002 dB. The device outputs data in a number of formats compatible with a range of manufacturers. Clock frequency The SAA7360 can operate in either master or slave mode (CMOS input drive levels). The clock can be either 256fs or 512fs (where fs is the sampling frequency) indicated via pin FSEL. System clock outputs equal to the input frequency (XSYS1) and half the input frequency (XSYS2) are provided to drive other ICs in the system. All performance parameters track with fs which can vary between 18 and 53 kHz without degradation of performance. Input buffer The input buffer stage consists of an uncommitted input operational amplifier (`A') and a committed unity gain operational amplifier (`B') to perform a single-to-double ended conversion for the differential ADC. The input buffer can be configured for pre-scaling and second order anti-aliasing filtering. The scaling should be performed so as to provide a maximum of 1 V RMS value at the output of the operational amplifier. Sigma-Delta modulator The analog-to-digital conversion is performed by a third order Sigma-Delta modulator, which outputs a 1-bit code at 128fs with a distortion plus noise figure of >90 dB. The modulator is scaled so that a 0 dB input results in an output of -3 dB, at the 1-bit outputs. Digital decimation filter The left and right channel 1-bit codes from the ADC are decimated from 128fs to 1fs in four stages of filtering. The first filter stage decimates by a factor of 16fs to 8fs using a 4th order combination type filter. The other three filter stages consist of three cascaded half-band filters each decimating by a factor of two. The half-band filter decimating from 8fs to 4fs has a gain of +2 dB to compensate for the -3 dB through the analog part and
SAA7360
allow a headroom of 1 dB to prevent clipping with DC offsets. The overall response of the digital decimation filter is a pass band from 0fs to 0.454fs (20 kHz at fs = 44.1 kHz) with a ripple of <0.0002 dB and a transition band of 0.454fs to 0.544fs. All frequencies between 0.544fs and 64fs which could result in aliasing into the base band are attenuated by >-93 dB. High-pass filter The operational amplifiers in the Sigma-Delta modulator can cause a small DC offset to be present in the 1-bit code passed to the digital section. This can result in the possibility of clicks when switching between devices and the recording of DC offsets which can upset offsets introduced in filters and noise shaping DACs in the playback path. A switchable high-pass filter is included on the IC after the decimation filter stage to allow the user to remove these DC offsets (selectable via pin HPEN). The filter does not affect the decimation process. The filter is 1st order high pass with following specifications: * Corner frequency (-3 dB): 1.7 Hz * Ripple: none * Above 100 Hz: <0.00002 dB; <1 degree * At 20 Hz: -0.03 dB, 5 degree phase deviation * Noise floor: -116 dB. Output interface The output interface can operate in master or slave mode selectable by pin TSEL. Master mode drives pins SWSO (word select), SCKO (bit clock) and SDO (data output). Slave mode receives the word clock on pin SWSI and the bit clock on pin SCKI. In slave mode the internal circuitry runs on the incoming bit clock and therefore cannot operate with burst clocks. Slave mode causes the pins SWSO and SCKO to be 3-stated allowing systems to connect SWSO and SCKO to pins SWSI and SCKI respectively for applications where the device has to operate in master and slave modes. The bit clock in master mode is at 32fs for 16-bit output, and 64fs for 18-bit output. In slave mode the bit clock is a minimum of 32fs and a maximum of 64fs. Three output formats are supported, I2S and two pseudo I2S modes common in digital audio ADC systems. These formats are shown in Fig.3. Selection of the three formats is given in Table 1. 16-bit or 18-bit output words can be chosen (via pin WSEL).
1995 Apr 24
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
Table 1 ODF2 0 0 1 1 Output data formats ODF1 0 1 0 1 test format 1 format 2 I2S MODE Reset
SAA7360
When pin RESET is held LOW the data outputs are set to zero. The RESET pin operates as a Schmitt trigger, enabling a power-on reset function by using an external RC circuit.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDDA VI IIK VO IO IDD or ISS Tamb Tstg Ves PARAMETER analog supply voltage DC input voltage DC input diode current DC output voltage DC output source or sink current total DC VDD or VSS current operating ambient temperature storage temperature electrostatic handling note 2 note 3 Notes 1. All VDD and VSS pins must be externally connected to the same power supply. 2. Equivalent to discharging a 100 pF capacitor via a 1.5 k series resistor with a rise time of 15 ns. 3. Equivalent to discharging a 200 pF capacitor via a 2.5 H series inductor. CHARACTERISTICS VDD = 5 V; Tamb = 25 C; fxtal = 256fs; fs = 44.1 kHz; unless otherwise specified. SYMBOL Supplies VDDA IDDA VDDD IDDD Ptot analog supply voltage analog supply current digital supply voltage digital supply current total power consumption 4.5 - 4.5 - - 5.0 43 5.0 50 465 5.5 - 5.5 - - V mA V mA mW PARAMETER CONDITIONS MIN. TYP. MAX. UNIT note 1 CONDITIONS MIN. -0.5 -0.5 - -0.5 - - -40 -65 -2000 -200 MAX. +6.5 +6.5 20 VDD + 0.5 20 0.5 +85 +150 +2000 +200 UNIT V V mA V mA A C C V V
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
SYMBOL Digital part inputs FSEL, HPEN, DSEL, TSEL, WSEL, ODF2, ODF1 AND CEN VIL VIH Zi Ci RESET VIL VIH VI ILI Ci VIL VIH ILI Ci VIL VIH ILI Ci Outputs SWSO, SCKO AND SDO VOL VOH CL ILI VOL VOH CL DCKO VOL VOH CL LOW level output voltage HIGH level output voltage load capacitance -400 A; note 1 20 A; note 1 - - - - 1.0 - 20 LOW level output voltage HIGH level output voltage load capacitance leakage current in 3-state note 2 -400 A; note 1 20 A; note 1 -400 A; note 1 20 A; note 1 - 2.4 - -10 - 2.4 - - - - - - - - +0.4 - 50 +10 LOW level input voltage HIGH level input voltage input hysteresis input leakage current input capacitance note 2 note 1 note 1 -0.5 0.6VDDD 0.2 -10 - -0.5 2.0 -10 - -0.5 0.7VDDD note 2 -10 - - - - - - - - - - - - - - LOW level input voltage HIGH level input voltage input impedance input capacitance note 1 note 1 -0.5 2.0 - - - - 35 - +0.8 PARAMETER CONDITIONS MIN. TYP.
SAA7360
MAX.
UNIT
V V k pF
VDDD + 0.5 - 10
+0.2VDDD VDDD + 0.5 - +10 10
V V V A pF
SCKI and SWSI LOW level input voltage HIGH level input voltage input leakage current input capacitance note 1 note 1 +0.8 VDDD + 0.5 +10 10 V V A pF
Crystal oscillator input XIN LOW level input voltage HIGH level input voltage input leakage current input capacitance +0.8 VDDD + 0.5 +10 10 V V A pF
V V pF A V V pF
XSYS1 AND XSYS2 LOW level output voltage HIGH level output voltage load capacitance 0.4 - 35
V V pF
VDDD - 1.0 -
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
SYMBOL PARAMETER CONDITIONS MIN. -0.5 2.0 - - -400 A; note 1 20 A; note 1 - - - - 35 - - - TYP.
SAA7360
MAX.
UNIT
Input/outputs DIOR and DIOL VIL VIH Zi Ci VOL VOH CL fxtal Gm Gv Ci CFB Co ILI Timing External clock input XIN fi tr tf msr input frequency input rise time input fall time mark-space ratio note 3 VIL to VIH VIH to VIL slave mode; 256fs slave mode; 512fs System clock outputs XSYS1 and XSYS2 (note 4) tr tf tH output rise time output fall time output HIGH time (relative to clock period) VOL to VOH VOH to VOL note 5 - - 40 - - 50 15 15 60 ns ns % 4.608 - - 45 40 256fs or 512fs - - - - 27.136 10 10 55 60 MHz ns ns % % LOW level input voltage HIGH level input voltage input impedance input capacitance LOW level output voltage HIGH level output voltage load capacitance note 1 note 1 +0.8 VDDD + 0.5 - 10 1.0 - 20 V V k pF V V pF
VDDD - 1.0 -
Crystal oscillator input XIN and output XOUT crystal operating frequency mutual conductance small signal voltage gain input capacitance feedback capacitance output capacitance input leakage current note 2 note 3 100 kHz Gv = Gm x Ro 4.608 1.5 - - - - -10 256fs or 512fs - 3.5 - - - - 27.136 - - 10 5 10 +10 MHz mA/V V/V pF pF pF A
1-bit code outputs (see Fig.4); 1-bit code inputs (see Fig.5) CLOCK DCKO tr tf tH tL clock output rise time clock output fall time clock output HIGH time clock output LOW time note 6 note 6 - - 45 45 - - - - 15 15 - - ns ns ns ns
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
SYMBOL PARAMETER CONDITIONS - - -30 - - 30 30 MIN. - - - - - - - TYP.
SAA7360
MAX.
UNIT
DATA DIOL AND DIOR tdor tdof td tdir tdif tsu th data output rise time clock output fall time data output delay time (relative to DCKO) data input rise time data input fall time data input set-up time (relative to DCKO) data input hold time (relative to DCKO) note 6 note 6 note 6 15 15 +30 20 20 - - ns ns ns ns ns ns ns
Serial data outputs (see Fig.6) CLOCK SCKO tr tf tr tf tsr thr tr tf tHC tLC tr tf tsr thr DATA SDO tr tf tdod tsr thr data output rise time data output fall time data output delay time data output set-up time data output hold time note 7 note 7 note 10 note 8 note 8 - - -100 100 100 - - - - - 30 30 +100 - - ns ns ns ns ns clock output rise time clock output fall time note 7 note 7 - - - - 100 100 - - 50 50 - - note 10 note 10 100 100 - - - - - - - - - - - - - - 30 30 ns ns
WORD SELECT SWSO word select output rise time word select output fall time word select output hold time note 7 note 7 note 8 30 30 - - 100 100 - - 100 100 - - ns ns ns ns
word select output set-up time note 8
CLOCK SCKI (note 9) clock input rise time clock input fall time clock input HIGH time clock input LOW time ns ns ns ns
WORD SELECT SWSI (note 9) word select input rise time word select input fall time word select input set-up time word select input hold time ns ns ns ns
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
SYMBOL Analog part VOLTAGE REFERENCE VrefL AND VrefR VI input voltage 2.0 - 2.3 2.7 - PARAMETER CONDITIONS MIN. TYP.
SAA7360
MAX.
UNIT
V
Current reference Iref (note 11) IO output current V refR --------------13 k A
DAC reference INPUT VDACN VI VI VI(rms) THD + N DR cs G tgd Notes 1. Minimum VIL, VOL and maximum VIH, VOH are peak values to allow for transients. 2. ILI minimum and ILO minimum measured at VI = 0 V; ILI maximum and ILO maximum measured at VI = VDDD. 3. fxtal is a multiple of the system sampling frequency fs which can vary between 18 and 53 kHz. 4. Output times are measured with a capacitive load of 35 pF; XSYS2 is the master clock frequency divided by 2. 5. tH valid only when used with XTAL, with 50% input mark space ratio; XSYS1 (tH) is measured at 12VDDD. 6. Output times are measured with a capacitive load of 20 pF. 7. Output times are measured with a capacitive load of 50 pF. 8. Relative to SCKO in master mode. 9. In slave mode the number of SCKI clocks in each channel should be <33 and the same in both. The polarity of SWSI indicates left/right channel. 10. Relative to SCKI in slave mode. 11. Iref connected to 0 V via a 13 k resistor. 12. The maximum recommended input voltage (referred to as 0 dB) yields a -1 dB output (relative to full-scale digital swing). The input voltage scales with V(VDACP) - V(VDACN); almost equal to VDDA, hence: [ V ( V DACP ) - V ( V DACN ) ] V I (0 dB) = ---------------------------------------------------------------------- V (RMS value) 5 13. Device measured with external components as shown in recommended application diagram (see Fig.7). 1995 Apr 24 11 input voltage - - - VSSA VDDA 1 -90 (0.003%) 97 100 -1 1.25 - - - -85 (0.0056%) - - -0.5 - V INPUT VDACP input voltage V Sigma-Delta modulator inputs PINR, NINR, PINL and NINL input voltage (RMS value) note 12 V
ADC performance (note 13) total harmonic distortion + noise dynamic range channel separation gain group delay (in pass band) note 16 at -1 dB digital output; - note 14 note 14 fi = 1 kHz; note 15 93 - -1.5 - dB dB dB dB ms
Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
SAA7360
14. Typical values are for 18-bit performance, minimum and/or maximum values are for 16-bit performance. 15. This is the ratio (in dB) of the digital output amplitude of single tone, in one channel, to the digital output amplitude of the same tone in the measurement channel. This definition presupposes that the channels have the same gain. (55.5 1) 16. Group delay = ------------------------- , where fs is the output sampling frequency. Typical value given is for fs = 44.1 kHz. fs
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SCKO/SCKI
SWSO/SWSI
L
R
SDO
MSB
MSB - 1
LSB
0
MSB
MSB - 1
I2 S FORMAT
SCKO/SCKI
SWSO/SWSI
L
R
SDO
MSB
MSB - 1
LSB
0
MSB
MSB - 1
FORMAT 1
SCKO/SCKI
SWSO/SWSI
L
R
SDO
MSB
MSB - 1
LSB
0
MSB
MSB - 1
MLA716 - 1
FORMAT 2
Fig.3 Output interface modes.
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
SAA7360
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clock period TDCK tr VDD 1.0 V tf td VDD DIOL and DIOR 1.0 V
MLA717
tL 1V
tH
DCKO
1V
Fig.4 One bit code output timing.
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clock period TDCK tr VDD DCKO 1.0 V tf th VDD DIOL and DIOR 1.0 V
MLA718
tL 1V
tH
t su 1V
Fig.5 One bit code input timing.
1995 Apr 24
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
SAA7360
handbook, full pagewidth
clock period TSCK t LC 2.0 V SCKO/SCKI 0.8 V t hr t sr 2.0 V 0.8 V
MLA719
t HC
SWSO/SWSI or SDO
Fig.6 Serial output timing.
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5V
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150 33 PINL 34 BBOL 35 47 nF 47 F VrefL 4.7 5V 47 F 47 nF 37 VSSA 36
APPLICATION INFORMATION
Philips Semiconductors
Bitstream conversion ADC for digital audio systems
VI (L) 100 k 330 k 100 pF 150 68 pF 47 nF 10 k 32 NINL 31 BAOL 30 BAIL 29 V DACP 28 I ref 27 VDACN 10 k 26 BAIR 25 BAOR 47 F 10 k 270 5V 47 F 13 k 10 270 k 100 k 620 k 68 pF 150
VI (R)
47 F
100 pF
150
24 NINR
23 PINR BBOR 22
VrefR
21 47 F 47 nF
SAA7360
VDDA VDDAT 20 47 F 19 14 12 11 to serial interface receiver VDDA 47 nF
15
VSSAT SWSO
100 k 5V
43 2.2 F
RESET VSSD 4 47 nF VDDD 5 4.7 11.2896 MHz XIN 6 100 k XOUT 7
SDO SCKO
MLA720 - 2
47 F
33 pF
15 pF
Product specification
SAA7360
Pins 1 to 3, 8 to 10, 13, 15 to 18, 38 to 42 and 44 are not connected.
Fig.7 Application diagram.
Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
PACKAGE OUTLINE QFP44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm
SAA7360
SOT205-1
c
y X
33 34
23 22 ZE
A
e E HE wM bp pin 1 index 44 1 11 ZD bp D HD wM B vM B 12 detail X L Lp A A2 A1 (A 3)
e
vM A
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.60 A1 0.25 0.05 A2 2.3 2.1 A3 0.25 bp 0.50 0.35 c 0.25 0.14 D (1) 14.1 13.9 E (1) 14.1 13.9 e 1 HD 19.2 18.2 HE 19.2 18.2 L 2.35 Lp 2.0 1.2 v 0.3 w 0.15 y 0.1 Z D (1) Z E (1) 2.4 1.8 2.4 1.8 7 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT205-1 REFERENCES IEC 133E01A JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-08-01
1995 Apr 24
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
SOLDERING Plastic quad flat packages BY WAVE During placement and before soldering, the component must be fixed with a droplet of adhesive. After curing the adhesive, the component can be soldered. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 C within 6 s. Typical dwell time is 4 s at 250 C. A modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. Using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications. BY SOLDER PASTE REFLOW Reflow soldering requires the solder paste (a suspension of fine solder particles, flux and binding agent) to be DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
SAA7360
applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. Dwell times vary between 50 and 300 s according to method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 min at 45 C. REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING
IRON OR PULSE-HEATED SOLDER TOOL)
Fix the component by first soldering two, diagonally opposite, end pins. Apply the heating tool to the flat part of the pin only. Contact time must be limited to 10 s at up to 300 C. When using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 C. (Pulse-heated soldering is not recommended for SO packages.) For pulse-heated solder tool (resistance) soldering of VSO packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement.
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
NOTES
SAA7360
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Philips Semiconductors
Product specification
Bitstream conversion ADC for digital audio systems
NOTES
SAA7360
1995 Apr 24
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Philips Semiconductors - a worldwide company
Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213, Tel. (01)60 101-1236, Fax. (01)60 101-1211 Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands, Tel. (31)40 783 749, Fax. (31)40 788 399 Brazil: Rua do Rocio 220 - 5th floor, Suite 51, CEP: 04552-903-SAO PAULO-SP, Brazil. P.O. Box 7383 (01064-970). Tel. (011)821-2333, Fax. (011)829-1849 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS: Tel. (800) 234-7381, Fax. (708) 296-8556 Chile: Av. Santa Maria 0760, SANTIAGO, Tel. (02)773 816, Fax. (02)777 6730 Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17, 77621 BOGOTA, Tel. (571)249 7624/(571)217 4609, Fax. (571)217 4549 Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. (032)88 2636, Fax. (031)57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. (9)0-50261, Fax. (9)0-520971 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. (01)4099 6161, Fax. (01)4099 6427 Germany: P.O. Box 10 63 23, 20043 HAMBURG, Tel. (040)3296-0, Fax. (040)3296 213. Greece: No. 15, 25th March Street, GR 17778 TAVROS, Tel. (01)4894 339/4894 911, Fax. (01)4814 240 Hong Kong: PHILIPS HONG KONG Ltd., 15/F Philips Ind. Bldg., 24-28 Kung Yip St., KWAI CHUNG, N.T., Tel. (852)424 5121, Fax. (852)480 6960/480 6009 India: Philips INDIA Ltd, Shivsagar Estate, A Block , Dr. Annie Besant Rd. Worli, Bombay 400 018 Tel. (022)4938 541, Fax. (022)4938 722 Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4, P.O. Box 4252, JAKARTA 12950, Tel. (021)5201 122, Fax. (021)5205 189 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. (01)640 000, Fax. (01)640 200 Italy: PHILIPS SEMICONDUCTORS S.r.l., Piazza IV Novembre 3, 20124 MILANO, Tel. (0039)2 6752 2531, Fax. (0039)2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2 -chome, Minato-ku, TOKYO 108, Tel. (03)3740 5028, Fax. (03)3740 0580 Korea: (Republic of) Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. (02)794-5011, Fax. (02)798-8022 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905, Tel. 9-5(800)234-7381, Fax. (708)296-8556 Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB Tel. (040)783749, Fax. (040)788399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. (09)849-4160, Fax. (09)849-7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. (022)74 8000, Fax. (022)74 8341 Pakistan: Philips Electrical Industries of Pakistan Ltd., Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton, KARACHI 75600, Tel. (021)587 4641-49, Fax. (021)577035/5874546. Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc, 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. (02)810 0161, Fax. (02)817 3474 Portugal: PHILIPS PORTUGUESA, S.A., Rua dr. Antonio Loureiro Borges 5, Arquiparque - Miraflores, Apartado 300, 2795 LINDA-A-VELHA, Tel. (01)4163160/4163333, Fax. (01)4163174/4163366. Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. (65)350 2000, Fax. (65)251 6500 South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. (011)470-5911, Fax. (011)470-5494. Spain: Balmes 22, 08007 BARCELONA, Tel. (03)301 6312, Fax. (03)301 42 43 Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM, Tel. (0)8-632 2000, Fax. (0)8-632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. (01)488 2211, Fax. (01)481 77 30 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978, TAIPEI 100, Tel. (02)388 7666, Fax. (02)382 4382. Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, Bangkok 10260, THAILAND, Tel. (662)398-0141, Fax. (662)398-3319. Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. (0 212)279 27 70, Fax. (0212)282 67 07 United Kingdom: Philips Semiconductors LTD., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. (0181)730-5000, Fax. (0181)754-8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556 Uruguay: Coronel Mora 433, MONTEVIDEO, Tel. (02)70-4044, Fax. (02)92 0601
Internet: http://www.semiconductors.philips.com/ps/ For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands, MD EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 SCD38 (c) Philips Electronics N.V. 1995
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
513061/1500/03/pp20 Document order number: Date of release: 1995 Apr 24 9397 750 00081
Philips Semiconductors

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